In an analog-digital converting circuit, a comparator used for comparing voltages typically includes two MOS (metal oxide semiconductor) transistors having gate electrodes that receive first and second ones of different input signals, two current paths in which current controlled by the MOS transistors flows, and a latch unit that amplifies a difference between potentials of the current paths and that holds the amplified potential difference.
Thus, when the comparator has a difference in characteristics in the MOS transistors for controlling the current flowing in the current paths and a difference in characteristics in MOS transistors that constitute the latch unit, an offset occurs during the comparison of the voltages between the differential input signals.
In addition, characteristic differences also occur in MOS transistors belonging to another comparator. That is, offsets that occur in the comparators vary for each comparator, which means that variations occur in the offsets of the comparators.
When an analog-digital circuit realizes digitalization by using a configuration in which a plurality of serial resistances are used to divide a section between a ground voltage and a reference voltage into equally spaced voltage sections and to which of the voltage sections a voltage of an analog signal input using a plurality of comparators belongs is determined, the determination as to which of the voltage sections the voltage belongs varies at the boundaries of the voltage sections, in the presence of variations in offset values of the comparators.
Accordingly, in order to overcome the determination variations, Japanese Laid-open Patent Publication No. 2001-111421 discloses a cancel circuit for canceling an offset of a comparator. Japanese Laid-open Patent Publication No. 2001-111421 proposes a technology in which cancel current for canceling the offset is caused to flow to one of two current paths in the comparator.
The cancel current constantly flows in the current paths while an operation for comparing potentials of signals input to the comparator is performed. Hence, the amount of current consumed by the comparator including the cancel circuit increases compared to a comparator that does not include the cancel circuit.